CoreTile Express

CoreTile Express 板在 Versatile™ Express 开发系统中提供主系统 CPU。CoreTile 必须与提供电源、配置和外设连接的主板 Express uATX 板配对使用。

处理器子板 Express 板与 Versatile 产品系列中的前代产品的不同之处在于，其内存和 LCD 控制器等高带宽外设是与 ARM 处理器一起在测试芯片中实现的。这会显示提升性能，使系统更适合进行软件基准测试并完全能运行 Debian Linux 等桌面操作系统。

处理器子板 Express 系列支持的 ARM 处理器有：

• Cortex™-A15 MPCore
• Cortex-A9 MPCore
• Cortex-A7 MPCore
• Cortex-A5 MPCore

功能列表

处理器子板名称	CoreTile Express  用于 Cortex™-A15、 Cortex-A7	CoreTile Express 适用于 Cortex-A9	CoreTile Express 适用于 Cortex-A5
处理器子板名称（简称）	V2P-CA15x2_CA7x3	V2P-CA9x4	V2P-CA5x2s
部件号	V2P-CA15-0314A	V2P-CA9-0301A	V2P-CA5-0305A
PCB 号	HBI-0249	HBI-0191	HBI-0225
数据表	数据表	数据表	数据表
手册	用户手册	用户手册	用户手册
产品视频	n/a	n/a	视频
CPU 类型	Cortex-A15 MPCore™	Cortex-A9 MPCore	Cortex-A5 MPCore
	Cortex-A7 MPCore™
CPU 数量，速度	双核 CA15，1GHz 三核 CA7，800MHz	四核，400MHz	双核，100MHz
CPU 版本	r2p1，r0p1	r0p1	r0p1-RC0
协处理器	NEON™	NEON	NEON
L1 高速缓存 I/D	32KB/32KB	32KB/32KB	32KB/32KB
L2 高速缓存	1MB	512KB	256KB
TCM	N/A	N/A	N/A
SRAM（片上）	64KB，64 位	16KB，64 位	64KB
SDRAM	2GB DDR2，32 位	1GB DDR2，32 位	1GB DDR2 SODIMM
SDRAM 速度	400MHz	266MHz	120MHz
AMBA 总线类型	AXI	AXI	AXI
内部 AMBA 总线速度	500MHz	200MHz	100MHz
外部 AMBA 总线速度	50MHz (M)	50MHz (M)、30MHz (S)	40MHz (M)、40MHz (S)
嵌入式跟踪	16/32 位，PTM，ETB (4KB)	16/32位，PTM，ETB (8KB)	ITM，ETB (8KB)
调试连接	JTAG 和 SWD，20 针 DIL	JTAG 和 SWD，20 针 DIL	JTAG 和 SWD，20 针 DIL

Versatile Express Cortex-A7x3/A15x2 五核核心板

规格参数文档概述

The Versatile™ Express family development boards provide an
excellent environment for prototyping the next generation
system-on-chip designs. Through a range of plug-in options,
hardware and software applications can be developed and
debugged.
The CoreTile Express for the ARM® Cortex™-A15 MPCore™
and Cortex-A7 processors is a test chip-based development
platform which implements a complete SoC design around these
processors. This chip is the first commercially available silicon
that demonstrates the power-saving capabilities of ARM big.
LITTLE™ processing It enables:
• Exploration of the big.LITTLE architecture
• Boot code, hypervisor, cluster-switching, device driver and
application software development
• Software debug and development of software tools through
the on-chip CoreSight™ debug and trace infrastructure.

Features
• Processor Subsystem
- Dual Cluster, big.LITTLE configuration
- 2 x ARM Cortex-A15 with VFP and NEON,™ r2p1
- 1GHz operating speed
- Caches: L1 32 KB, L2 1MB
- 3 x ARM Cortex-A7 with VFP and NEON, r0p1
- 800MHz operating speed
- Caches: L1 32KB, L2 512KB
- CoreSight ETM/PTM per core + 16KB ETB
- DVFS control via System Configuration Controller
• AMBA® AXI™ Subsystem
- Internal CCI-400, 128-bit, 500MHz, r0p2
- Internal NIC301, 64-bit, 500MHz
- External AMBA AXI: Master port 64-bit, 50MHz
- DDR2 interface: DMC-400, 400MHz, r0p0
- 2GB OF 32-bit DDR2 memory
- DMAC: PL330, 128-bit
- Static Memory Bus Interface:PL354
- 32-bit 50MHz to motherboard
- Boot from motherboard NOR Flash
- HDCLD video controller: 1920 x 1080p, 60Hz
• Expansion support
- AMBA AXI Master link to expansion FPGA daugherboard
• Debug
- ARM JTAG: 20-way DIL box header
- ARM 32-bit parallel trace: dual 38-pin Mictors
• Simplified configuration via motherboard
- System appears as a USB flash drive on a PC
- Fast programming and configuration
- Configuration text files for system settings
- Remote power control via RS232
Deliverables
• V2P-CA15x2 CA7x3 daughterboard
• Versatile Express support DVD
• Example AMBA AXI subsystem design
- Additional LogicTile required
• SelfTest software
• Linux BSP