UDA1380 立体声音频编解码器芯片芯片用户手册

 UDA1380 立体声音频编解码器芯片

使用该芯片的有：

MYD-LPC4357 工控板/开发板

MYD-LPC4350 工控板/开发板

MYD-LPC1857 工控板/开发板

MYD-LPC1850 工控板/开发板

MYD-LPC1788 工控板/开发板

1 FEATURES
1.1 General
· 2.4 to 3.6 V power supply
· 5 V tolerant digital inputs (at 2.4 to 3.6 V power supply)
· 24-bit data path for Analog-to-Digital Converter (ADC)
and Digital-to-Analog Converter (DAC)
· Selectable control via L3-bus microcontroller interface
or I2C-bus interface; choice of 2 device addresses in
L3-bus and I2C-bus mode
Remark: This device does not have a static mode
· Supports sample frequencies from 8 to 55 kHz for the
ADC part, and 8 to 100 kHz for the DAC part. The ADC
cannot support DVD audio (96 kHz audio), only
Mini-Disc (MD), Compact-Disc (CD) and Moving Picture
Experts Group Layer-3 Audio (MP3). For playback
8 to 100 kHz is specified. DVD playback is supported
· Power management unit:
– Separate power control for ADC, Automatic Volume
Control (AVC), DAC, Phase Locked Loop (PLL) and
headphone driver
– Analog blocks like ADC and Programmable Gain
Amplifier (PGA) have a block to power-down the bias
circuits
– When ADC and/or DAC are powered-down, also the
clocks to these blocks are stopped to save power
Remark: By default, when the IC is powered-up, the
complete chip will be in the Power-down mode.
· ADC part and DAC part can run at different frequencies,
either system clock or Word Select PLL (WSPLL)
· ADC and PGA plus integrated high-pass filter to cancel
DC offset
· The decimation filter is equipped with a digital Automatic
Gain Control (AGC)
· Mono microphone input with Low Noise Amplifier (LNA)
of 29 dB fixed gain and Variable Gain Control (VGA)
from 0 to 30 dB in steps of 2 dB
· Integrated digital filter plus DAC
· Separate single-ended line output and one stereo
headphone output, capable of driving a 16 W load. The
headphone driver has a built-in short-circuit protection
with status bits which can be read out from the
L3-bus or I2C-bus interface
· Digital silence detection in the interpolator (playback)
with read-out status via L3-bus or I2C-bus interface
· Easy application.

1.2 Multiple format data input interface
· Slave BCK and WS signals
· I2S-bus format
· MSB-justified format compatible
· LSB-justified format compatible.
1.3 Multiple format data output interface
· Select option for digital output interface: either the
decimator output (ADC signal) or the output signal of the
digital mixer which is in the interpolator DSP
· Selectable master or slave BCK and WS signals for
digital ADC output
Remark: SYSCLK must be applied in WSPLL mode and
master mode
· I2S-bus format
· MSB-justified format compatible
· LSB-justified format compatible.
1.4 ADC front-end features
· ADC plus decimator can run at either WSPLL,
regenerating the clock from WSI signal, or on SYSCLK
· Stereo line input with PGA: gain range from 0 to 24 dB
in steps of 3 dB
· LNA with 29 dB fixed gain for mono microphone input,
including VGA with gain from 0 to 30 dB in steps of 2 dB
· Digital left and right independent volume control and
mute from +24 to -63.5 dB in steps of 0.5 dB.