DM9161A 10/100Mbps 快速以太网物理层的单芯片收发器芯片用户手册

DM9161A 10/100Mbps 快速以太网物理层的单芯片收发器芯片用户手册

使用该芯片的有：

MYD-SAM9G15 工控板/开发板/核心板

MYD-SAM9G25 工控板/开发板/核心板

MYD-SAM9G35 工控板/开发板/核心板

MYD-SAM9X25 工控板/开发板/核心板

MYD-SAM9X35 工控板/开发板/核心板

MYS-SAM9G45 工控板/单板机

MYS-SAM9G15 工控板/单板机

MYS-SAM9G25 工控板/单板机

MYS-SAM9G35 工控板/单板机

MYS-SAM9X25 工控板/单板机

MYS-SAM9X35 工控板/单板机

1. General Description
The DM9161A is a physical layer, single-chip, and low power transceiver for 100BASE-TX and 10BASE-T
operations. On the media side, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable
(UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the Media
Independent Interface (MII), the DM9161A connects to the Medium Access Control (MAC) layer, ensuring a high
inter operability from different vendors.
TheDM9161A uses a low power and high performance advanced CMOS process. It contains the entire physical
layer functions of 100BASE-TX as defined by IEEE802.3u, including the Physical Coding Sublayer (PCS),
Physical Medium Attachment (PMA), Twisted Pair Physical Medium Dependent Sublayer (TP-PMD), 10BASE-TX
Encoder/Decoder (ENC/DEC), and Twisted Pair Media Access Unit (TPMAU). The DM9161A provides a strong
support for the auto-negotiation function, utilizing automatic media speed and protocol selection. Furthermore, due
to the built-in wave shaping filter, the DM9161A needs no external filter to transport signals to the media in
100BASE-TX or 10BASE-T Ethernet operation.

2. Features
� Fully comply with IEEE 802.3 / IEEE 802.3u 10Base-T/
100Base-TX, ANSI X3T12 TP-PMD 1995 standard
� Support MDI/MDI-X auto crossover function
(Auto-MDI)
� Support Auto-Negotiation function, compliant with IEEE
802.3u
� Fully integrated Physical layer transceiver On-chip
filtering with direct interface to magnetic transformer
� Selectable repeater or node mode
� Selectable MII or RMII (Reduced MII) mode for
100Base-TX and 10Base-TX. Selectable MII or GPSI
(7-Wired) mode for 10Base-T
� Selectable full-duplex or half-duplex operation
� MII management interface with maskable interrupt
output capability
� Provide Loopback mode for easy system
diagnostics
� LED status outputs indicate Link/ Activity, Speed10/100
and Full-duplex/Collision. Support Dual-LED optional
control
� Single low power Supply of 3.3V with an advanced
CMOS technology
� Very Low Power consumption modes:
● Power Reduced mode (cable detection)
● Power Down mode
● Selectable TX drivers for 1:1 or 1.25:1 transformers
for additional power reduction. 1: 1 transformers only
when Auto MDIX Enable .
� Compatible with 3.3V and 5.0V tolerant I/Os
� 48-pin LQFP